I merged my consulting business with other partners to create a boutique Investment Bank called Infinitedge – still focused in semiconductors, but covering the broader IT markets.

The industry has seen an intense period of consolidation and transformation.with a significant shift in emphasis to system solutions (from component solutions). divestiture by large cap companies in non-core product lines or business units, has created opportunities for others to acquire revenue-based businesses that complement existing products and businesses – but inevitably need further investment (typically the reason for divestiture in the first place). However, capital has been easier to source (low interest rates) and private equity firms are continuously on the prowl for new, lower leveraged investments. Even the VC community has turned its head toward investment in small cap companies that may be undervalued or stagnant in the market, stimulating an acquisitive behavior where divestments and small, struggling private companies representing a potential segue into new, adjacent markets.

Commodity products continue to be problematic as ASP erosion continues – although volume is growing, revenue and margin growth are stalling. Higher value products typically deliver solutions based on complex technologies (analog/RF/MEMs) and copious amounts of software/firmware.

Vertical market focus is becoming the mantra – play to your strength and drive to be number one.

I hope to share some observations with you in the following months, I am sure you will continue to add your own flavor!

Over the last two years I have seen many high tech companies reposition their business focus to address the alternate energy initiative.

Materials, processes and product companies have extended (or redirected) R&D activities to leverage core technologies in the energy conservation and or efficiency space. While wind-energy, nuclear-energy, Hydro-energy etc., are strong contenders for alternate energy sources, solar power seems to have the lion’s share of attention. Maybe this is because the capital investment requirement is within the individual consumer/home-owner’s range, and the resulting power is readily available to the consumer. The capital investment in most other alternate energy sources is significantly greater and in many instances is not a practical solution for individual consumers (wind turbines, nuclear reactors!).

The energy conversion, distribution and management processes are what have attracted the interest of many high tech companies. Solar technology, or more specifically photovoltaic (PV) energy conversion, is a favored alternate energy in most sunny countries. Surprisingly though, Germany is the foremost user/consumer of PV energy, with over 95% of installations being grid-tied (systems tied to the local grid such that excesses in required consumption can be sold to the utility company, or additional power required can be purchased from the utility company).

Traditional solar cell manufacturing from standard crystalline silicon modules is now being supplemented by alternatives including casting wafers instead of sawing, thin film, concentrator modules, ‘Sliver’ cells, and continuous printing processes (see this link for more info).

All solar cells produce a DC current through the power conversion process (harvesting). Depending on the solar system, the DC current can be converted to AC current at the panel (multiple DC to AC inverters), or combined with other panels and converted in a single DC to AC inverter. Clearly, the two major objectives in any system are low cost and high efficiency (but not at the unacceptable cost of size/weight).

In installations that are not grid-tied, and do not have other sources of electrical power, energy storage becomes very important. Battery technology continues to evolve – cost, size, capacity and life are key factors.

Now we can see why high tech companies are reviewing their core technologies, and looking to acquire new technologies, that can addresses the materials, processes, manufacturing, architecture and design of solar energy conversion and storage systems. Many times it will be a combination of technologies that creates the better solution – not necessarily at a systems integrator level but at the basic architecture level. Semiconductor manufacturers can address a large portion of the solar solution (wafers, modules, DC to AC, grid-tied command and control etc.,) and have taken the initiative in this area (see National Semiconductor’s SolarMagic). However, there are many other areas where clever use of existing components and technologies can be applied to address the cost/size/efficiency/capacity/connectivity of solar power systems (see Sympagis).

In technology areas where significant investment has been made, yet anticipated returns are unlikely to be realized, perhaps some thinking “out of the box” can divert such technology development to complement the activities in alternate energy system requirements.

High tech companies are typically synonymous with high capital requirements.  Technology and product R&D projects runs into the millions and tens of millions. The revenues from these projects must not only create positive cash flow, but sufficient cash to meet three main objectives: a) cover all costs/overheads, b) fund new projects, and c) add to the cash reserves (a return on capital). If all three objectives are not met, then there is a loss of value and most likely a loss of cash.

This is where young, early growth companies are most challenged – how to get to a cash flow positive position, AND create enough cash to fund the operations/R&D forward. If products have limited life (less than 3 years), and development is capital intensive, then there is a serious question about scale. Can the products quickly generate enough volume/revenue/margin to first justify the product (in terms of return on investment) and secondly, sufficient cash flow to support further product development? If not, then value and cash are reduced. The need for continued product development would then require investment from other sources – further sale of securities, debt financing and/or technology leveraging through licensing etc. This is the vicious circle of raising funds, establishing valuation and diluting shareholding. Until cash flow is positive, one must continuously re-evaluate what it takes to get there.

Understanding cash flow requirements is critical to any operation. Having cash is not good enough – this can quickly dissipate if objectives are not being met. Generating cash is the objective, and if current projects/products are not delivering, it is time to re-evaluate the technology/product/market – essentially the business plan!

http://www.feld.com/wp/archives/2008/06/revisiting-the-term-sheet.html

Last week I attended a social evening hosted by a Bay Area VC. There was an interesting mix of portfolio companies, syndicate partners, bankers and industry executives – a lot of high tech, but across a broad range of markets and applications.

Although there was some “doom and gloom” sentiment, the general attitude was one of opportunity.

Consolidation was one of the topics of discussion, but spin-out and break-up was also on people’s minds. Who is acquiring/merging with whom? And what would be the underlying rationale for such levels of consolidation? Which corporate entities would divest business units that were no longer core to the survival/growth strategy?

Alternate energy and energy conservation clearly continue to draw attention, but finding highly differentiated technology/product was still a challenge. Solar continues to be a focal point with PV technology/manufacturing, electrical energy conversion and grid-tied systems being discussed. Interesting to note the number of semiconductor players who have started to apply power management techniques to solar applications (harvesting, conversion, command & control).

IP sourcing was also a point of discussion. While there are still many IP providers, the business model of discussion was IP brokering. In a previous post specific to semiconductor IP, I had asked the question of best practice in making IP available to design houses that are shifting to system solutions ( http://mikekayca.wordpress.com/2009/03/22/what-does-a-semiconductor-company-look-like-today/), the comments at this forum seemed to favor a much broader IP brokering service in high tech. The advent of Pluritas LLC (http://www.pluritas.com) and IPotential LLC (http://ipotential.com) et al, begins to change the face of IP as a defensive posture to that of monetizing an asset.

Perhaps IP at this scale is only applicable to the extensive portfolios of large corporations (the old threat of mutual destruction), but it begs the questions of whether such a brokering approach may also fit the needs of system design houses that can select from a large array of IP (physical, soft and theoretical) to deliver specific, highly integrated products where licensing of such IP is embedded in the supply chain?

If we are discussing what a semiconductor company looks like today, then indeed we should also discuss the definition of a chip designer within the context of the semiconductor company. For more exotic RF/linear/power processes and some challenging analog circuits I believe we still have the need for highly skilled transistor level design and custom layout engineers in design houses. There is also a need for transistor level designers inside the large scale memory, CPU and IP supplier companies. But the proliferation of IP blocks offered/brokered through EDA and/or foundries (as well directly!), has changed the nature of what chip design means. By elevating the SoC design role to one of architecture, system partitioning and implementation (where the implementation already represents a service provided by eSilicon, Faraday, Open-Silicon, eASIC, Key ASIC et al), we are asking the new breed of “chip designers” to be architects who can partition a system into the most efficient, high performance, low power structures possible, that are becoming more application specific. Developing a system level product for video processing requires knowledge of video streams, conversion rates, compression algorithms, standards, pixel correction etc., versus the silicon angle of ADC, DAC, DSP, CPU/MPU, RAM/ROM, I/O etc.

It would be interesting to get the views of both seasoned transistor level designers (typically with 20+ years of experience) and the newer breed of designers who are faced with the system level challenges (typically 5+ years of experience).

With the onset of system-on-chip (SoC), we saw the move toward a highly integrated device, typically containing analog interfacing, high speed serial digital interfacing, CPU/MPU, DSP, memory (DRAM/ROM & associated controllers) and logic to build state machine control.  Why was this SoC offering not called a “system solution”?  Simply put, because it did not solve a system challenge/problem – it was a way customers could add significant value through programmability and create differentiated system solutions.

In the customers hands, the SoC plus oodles of software/firmware became specific to an application in a specific market segment – basebands for communications protocol is a good example. Even though the SoC provided a highly programmable, cost effective integrated device platform, customers still had extensive R&D projects to get the SoC platform to a system level solutions. So risk and time to market were still a major challenge considering the complexity of evolving systems, especially if a customer picked an inappropriate SoC platform for a specific application (underestimated computing requirements, memory requirements, on-board interfacing etc.).

The fabless semicon model had continued to evolve (see last post) to a point where highly integrated SoC devices were becoming a “near product” in the target market segment – how? With IP blocks being more readily available, and software stacks also being added to the complement of IP blocks, fabless companies could target applications to a much more refined level. So a baseband communications device could include full network level, MAC, PHY and transceiver interface, with programmable access to the required levels to configure a device for a specific application in a given market segment ( WiFi, Bluetooth, modem, etc.). By the time this SoC is offered in a platform, the full eBOM has been created. Customers can immediately see how to finalize their product offering with “simple” API interfacing – a “near product” offering from the supplier.

How does this trend impact the industry? IMHO – it does create the right chemistry to allow an IP business model to grow, and it encourages the EDA and foundry players to “signpost” the way for new entrepreneurs (fallout from the semicon industry??) to focus system know-how into SoC products. In the end, we are selling an SoCs to easily identifiable customers (ODM and OEM), but in a much narrower (and hopefully deeper) market segment. The trick is to spread out the development cost of such products across industry partners (IP, software, silicon) such that each can make a fair return on the near-product sold to customers.

How does this trend affect the food chain? Again IMHO – there is a level of consolidation that will increase quality levels, reduce time-to-market (even though the time to develop required blocks may well increase, but this should not be in the critical path of a near-product) and reduce customer risk.

Although the expectation is that semiconductors keep getting cheaper (and hence resistance to anyone looking for a premium on semiconductor products), the concept of a near-product arguably hides the silicon element in favor of the system solution, and hence can carry a premium!

What does a semiconductor company look like today?  If we go back 25 years or more, the answer was relatively easy – the design and manufacture of  custom integrated circuits for sale in broad multi-market applications.   There were design houses (full custom) as such, but the majority of design/development was in captured manufacturers such as Fairchild, National semi, TI, Intel, IMB,  et al.

Then we saw the onset of fabless semiconductor companies during the early 80′s.  While these fabless companies performed IC design, they depended on partnerships with an IDM (integrated device manufacturer) to get their product into production.  During the later 80′s we saw the introduction of semi-custom IC design, manifest in the form of digital gate arrays and standard cells.  This elevated IC design flows to exclude actual transistor design – the flow required only simple knowledge of basic functions (NAND, NOR, Flip-Flop etc.).  This allowed a new wave of fabless semicon companies to be born.  By the end of the 80′s, the semiconductor foundry business model had been created which further stimulated the growth of fabless semiconductor companies.  The escalation in Fabless companies increased the size of the playing field for EDA suppliers and also stimulated the IP business model.  Standard cells, CPUs, MPUs, memory, IO and ultimately application specific IP brokering became the name of the game.

It was initially difficult for IP suppliers to work directly with IDM/Fabless companies because of their dependence on specific manufacturing processes – IP companies could not cover all processes and all foundries.  Although CMOS became the focal process point, not all CMOS processes were equal!  The IP players gravitated toward the foundries as natural partners – IP proven in a given process and ultimately sold as a cost adder to a wafer.

The business models for semiconductor companies continued to evolve during the 90′s – but the capital requirements for owning and running fabrication lines (fabs) were starting to become prohibitive.  Once we hit a $1B capital outlay for a fab,  even the IDMs started to increase the outsourced manufacturing – especially in the leading-edge nodes.  So now we have IDMs shifting to the fab-lite business model (no new investment in fabs), and the fabless semiconductor companies depending more on the foundry/IP partnership.

Let’s not forget the “glue” in all of this – the EDA companies.  The tools that enabled IP companies to deliver libraries to foundries (and design house services) had to try and maintain par with the rapid advancement of technology nodes.  Although one could say that EDA tools had been somewhat abstract up until the early 90′s, the need for tools to be tightly coupled with processes, as well as design flows, was now crucial.

As we entered the new millennium, the fabless semiconductor business model was undergoing another transformation.   Integration was reaching such high levels, that the emphasis shifted to system design rather than chip design – enter the System-on-Chip (SoC) era.  Although an embedded core plus memory and IO could arguably be called a system-on-chip, the acronym was more suitable to an SoC that had a specific application and would likely include some standards protocol.  Both IDM and fabless companies would find it progressively more difficult and costly to develop all of the required IP in-house, further promoting the demand of readily available (proven) IP blocks from suppliers and/or foundries.  The need for EDA tools to not only be more tightly linked to a process, but also a more tightly linked modeling level for increasing more complex IP elements, continued to mount.

Most recently, we have seen many fabless companies now become fabless and chipless – meaning they no longer retain circuit, layout, test, product or quality engineers.  Their requirements have moved to architects, software and system engineers.  Although they may sell an SoC in which their product is embedded, we can hardly call them a semiconductor company.  Likewise, the foundries had formed partnerships (mostly through direct investment) with chip design houses, to create the channel for fabless/chipless companies (and indeed many OEMs) to take receipt of finished goods for sale in their target markets.

So who now are the semiconductor companies?  I think we can all agree that the foundries are indeed semiconductor companies, but what about the changing nature of deisgn flows and traditional “back-end” activities?  I believe there is also a case to be made that  EDA players will continue to evolve toward a true semiconductor company where process, design, manufacturability and test will be their “backyard”.

The current economic and industrial downturn will see many companies fall by the wayside, be they fabless, chipless, IP or foundry.  This will create a new wave of consolidation in both IP/technology and products.  All IP has a “shelf-life” therefore it is incumbent on acquirers/buyers to ensure they are able to quickly make these levels of consolidation productive.  We must remember that “all that glitters is not gold”.

I read an article in EDAcafe last week – it was an interview with Jack Harding, CEO of eSilicon.  His comments are insightful and I believe accurate.  Here is the link.

Just a final thought that probably will form the basis for another posting.  I have been using the term “near product”  more and more in the last two years.  The cost of product development for an SoC has gone vertical!  While the actual cost of design and manufacturing of SoCs in bleeding-edge processes is enormous, the additional cost of software development, protocol,  standards compliance and delivery of a platform (full eBOM) that a customer can quickly turn into an end product, is equally enormous.  The Soc and platform are reaching a “near product” level, where customers are offered fastest path to revenue – how do we ensure customers pay for this “near product” rather than just an SoC?

A solid reference point will help tremendously in determining the validity of new products.  Forcing the team to show how product ideas and technology advancements can move the company toward its objectives, will create a level of discipline that hopefully becomes part of the culture.

Although my experiences are mostly within the semiconductor/electronic systems industry (hence a strong engineering flavor),  I believe that all companies benefit from some form of disciple regarding the decision making process of whether or not to commit resources to a particular new product.   Moreover, using some form of reference point will allow the team to continuously check against this initial reference point as the new product development progresses – is it still congruent with the company objectives?   If not, what action should be taken?

So what can be used as the reference point for validating new product development?    I trust we are all  familiar with the expression “the devil is in the details”.  I suggest the reference point should address the detail that will be required to justify a product and create a solid starting point.

Some form of template, to which the the team can easily relate, could be used as a starting point in justifying a new product and gaining approval/support from the whole management team.

I have provided a link here to such templates, the bop-template and tos-template are just an example of how a simple starting point can create the right thought process, detail level and discussion point for the management team.  There is a third document that can be very useful – a New Product business Analysis (NPBA).  This is essentially a spreadsheet that captures development costs, milestones, revenue/COS/GM, cost structure and ROI.  It seems I cannot upload an excel spreadshet to WordPress, so if you would like this template also, pleas elet me know.

I would be interested to hear any feedback!

The slides on “The start-up Challenge” may be of interest to many start-up companies that are feeling the pressure of the current down turn.  Although the slides do not speak to remedies (to be discussed in a future post), they can be used as a sanity check for defending a market position, or indeed taking away market share from competitors.